Technical Field
This disclosure relates generally to a memory interface system.
Description of the Related Art
In many memory systems, such as various double data rate (DDR) systems, a clock signal known as a data strobe is transmitted along with data signals. Data signals received at the memory may be synchronized to the data strobe.
As clock speeds increase, inherent delays between the data strobe and the data may cause errors. Such delays may be exacerbated by voltage and temperature variations. In some cases, delay elements may add delays to the data strobe, the data signals, or both to align the data strobe to the data signals. However, calibrating the delay elements may occupy resources that could otherwise be used by the memory system, which may negatively affect system performance.